灣區Marvell 徵才 - 面試
By Catherine
at 2019-06-26T14:30
at 2019-06-26T14:30
Table of Contents
收到的resume,我全部forward給了hiring manager,我自己也面試了很多人,我們組招
了其中一個,不管結果如何希望對大家有幫助。除了原本的AE缺還要招,還有新加的anal
og engineer ,有無經驗都可,但是new grad 指名要高GPA。沒有身分很可惜沒有機會,
這不用問了,有興趣的寄我信箱 [email protected]
1. Analog engineer
? Job Description
Marvell is seeking a Senior Level IC Design engineer experienced in Analog/Mi
xed-signal circuit design. You will design standard compliant
and next generation SERDES interface using state-of-the-art deep sub-micron CM
OS technologies.
You will have experience in one or more of the following areas and are require
d:
o MSEE or PhD plus 3 years or more
o Professional or academic demostrable experience on the deep sub-micron CM
OS technologies
o 2 plus years hands-on experience in designing mixed signal IO circuits in
cluding RX, TX, PLL, Bandgap bias
o circuits, regulators, and other analog circuits as well as performing the
top level (or chip-level) integration
o Demonstrable knowledge and minimum 2 years experience on channel equaliza
tion, CDR, signal integrity, and serial communication protocols such as USB2,
Fibre-Channel, SATA, PCI-E, etc. is a plus.
o Ability to comprehend the system level requirement and to translate it in
to the circuit level specifications.
o Demonstrable experince in IC design CAD tools such as Spectre, Spice, Mat
lab, Hsim, Verilog, etc
o Demostrable understanding of the physical layout requirement and ability
to perform the critical layouts
o Professional or academic experience lab testing skills to evaluate the pr
ototype unit to the design specification.
o Motivated to carry out a wide variety of tasks with clear communication a
nd presentation skills in a dynamic team environment.
o RF design knowledge&experience will be a big plus.
2. Application engineer
https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Santa-Clara-CA/
Senior-Application-Engineer_1900185
※ 引述《ckang (..)》之銘言:
: 我在Marvell 任職,已經在FB兩個群發文了,在PTT也分享本組兩個職缺,地點是Santa
C
: lara CA,有興趣可以寄resume 到我的信箱: [email protected],有問題也可以回
信
: 。我們也招entry level。
: 1. Firmware engineer
: Job Description:
: Marvell is looking for embedded firmware engineers to be part of an exciting
f
: irmware team for the PHY IP development. As a Firmware Engineer, you will
: ‧ Be responsible for design, development and verification of new firmware f
ea
: tures
: ‧ Participate in design reviews
: ‧ Deliver architectural documents, design specs, firmware source code and b
ui
: ld scripts
: ‧ Perform tasks including debug, bring up, beta and production firmware dev
el
: opment
: ‧ Collaborate with design, application and SoC teams
: Qualifications:
: ‧ Bachelor’s degree in Electrical Engineering, Computer Science or related
f
: ield
: ‧ Strong knowledge on microcontroller, experience with 8051 is a plus
: ‧ Experience in embedded firmware design, development and debugging
: ‧ Experience in C programming in an embedded environment
: ‧ Excellent technical communication and problem solving skills
: ‧ Experience with chip design simulation and verification is a plus
: ‧ Experience with SERDES technology, SAS, PCIe host interface is a plus
: 2. Application engineer
: https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Santa-Clara-C
A/
: Senior-Application-Engineer_1900185
--
了其中一個,不管結果如何希望對大家有幫助。除了原本的AE缺還要招,還有新加的anal
og engineer ,有無經驗都可,但是new grad 指名要高GPA。沒有身分很可惜沒有機會,
這不用問了,有興趣的寄我信箱 [email protected]
1. Analog engineer
? Job Description
Marvell is seeking a Senior Level IC Design engineer experienced in Analog/Mi
xed-signal circuit design. You will design standard compliant
and next generation SERDES interface using state-of-the-art deep sub-micron CM
OS technologies.
You will have experience in one or more of the following areas and are require
d:
o MSEE or PhD plus 3 years or more
o Professional or academic demostrable experience on the deep sub-micron CM
OS technologies
o 2 plus years hands-on experience in designing mixed signal IO circuits in
cluding RX, TX, PLL, Bandgap bias
o circuits, regulators, and other analog circuits as well as performing the
top level (or chip-level) integration
o Demonstrable knowledge and minimum 2 years experience on channel equaliza
tion, CDR, signal integrity, and serial communication protocols such as USB2,
Fibre-Channel, SATA, PCI-E, etc. is a plus.
o Ability to comprehend the system level requirement and to translate it in
to the circuit level specifications.
o Demonstrable experince in IC design CAD tools such as Spectre, Spice, Mat
lab, Hsim, Verilog, etc
o Demostrable understanding of the physical layout requirement and ability
to perform the critical layouts
o Professional or academic experience lab testing skills to evaluate the pr
ototype unit to the design specification.
o Motivated to carry out a wide variety of tasks with clear communication a
nd presentation skills in a dynamic team environment.
o RF design knowledge&experience will be a big plus.
2. Application engineer
https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Santa-Clara-CA/
Senior-Application-Engineer_1900185
※ 引述《ckang (..)》之銘言:
: 我在Marvell 任職,已經在FB兩個群發文了,在PTT也分享本組兩個職缺,地點是Santa
C
: lara CA,有興趣可以寄resume 到我的信箱: [email protected],有問題也可以回
信
: 。我們也招entry level。
: 1. Firmware engineer
: Job Description:
: Marvell is looking for embedded firmware engineers to be part of an exciting
f
: irmware team for the PHY IP development. As a Firmware Engineer, you will
: ‧ Be responsible for design, development and verification of new firmware f
ea
: tures
: ‧ Participate in design reviews
: ‧ Deliver architectural documents, design specs, firmware source code and b
ui
: ld scripts
: ‧ Perform tasks including debug, bring up, beta and production firmware dev
el
: opment
: ‧ Collaborate with design, application and SoC teams
: Qualifications:
: ‧ Bachelor’s degree in Electrical Engineering, Computer Science or related
f
: ield
: ‧ Strong knowledge on microcontroller, experience with 8051 is a plus
: ‧ Experience in embedded firmware design, development and debugging
: ‧ Experience in C programming in an embedded environment
: ‧ Excellent technical communication and problem solving skills
: ‧ Experience with chip design simulation and verification is a plus
: ‧ Experience with SERDES technology, SAS, PCIe host interface is a plus
: 2. Application engineer
: https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Santa-Clara-C
A/
: Senior-Application-Engineer_1900185
--
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面試
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By Elizabeth
at 2019-07-01T13:17
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