為什麼design compiler這麼猛 - 工程師

By Charlie
at 2018-10-28T19:59
at 2018-10-28T19:59
Table of Contents
從以前在合成電路的時候就有這種想法
無論寫的電路多爛
Design Compiler總是無怨無悔的進行合成
一句抱怨也沒有,著實讓人佩服
有時候明知道自己寫了個垃圾,還是餵給他合的時候
看著他艱辛的進行global optimization
很想叫他:「停下來!別再合了!這樣下去你會壞掉的!!!」QQ
可他還是毅然決然、不發一語的繼續合著...
通常只要RTL沒有太大的問題
電路也一定合得出來(不管timing violation的話)
想請問為什麼design compiler這麼猛阿?
有人可以告訴肥宅我嗎?
肥宅我真的好想進synopsys喔QQ
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