韌體工程師需要會看 verilog嗎? - 工程師
By Skylar DavisLinda
at 2020-09-09T00:06
at 2020-09-09T00:06
Table of Contents
小弟最近都在幫designer解HW issue
不過SW能做的通常就是各種narrow down實驗
逐個檢查 SW下的 reg flow 符不符合designer預期
把某些reg setting拿掉看有沒有影響
比較厲害一點的可以看designer提供的HW架構圖觀落陰
我在想，如果SW能看懂verilog，是不是做實驗的時候能更有方向呢
版上有韌體工程師解HW issue的時候會跟designer一起看verilog的嗎?
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