高階合成HLS 台灣的Design house有用嗎 - 工程師
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By Kelly
at 2015-07-11T17:24
at 2015-07-11T17:24
Table of Contents
如題 小弟因為要報PAPER 所以無意間發現這個東西
high level synthesis 高階合成
指以高階語言描述電路 並轉換為RTL Code
維基上面寫約略80年代就有開始發展 但大多都不太成功
直到最近兩三年 Xilinx 的 AutoESL's AutoPilot 這套工具算是有比較大的進展
想請問這東西的未來 因為上網了看了許多PAPER與文件 發現對於不同層級的設計者
從高階語言與硬體描述語言之間看法與實作上的歧異
高階合成的概念似乎有它的價值在 想請問各位先進這東西將來在台灣有搞頭嗎
因為聽前人所說目前電路設計依然是verilog VHDL為主 謝謝大家
--
high level synthesis 高階合成
指以高階語言描述電路 並轉換為RTL Code
維基上面寫約略80年代就有開始發展 但大多都不太成功
直到最近兩三年 Xilinx 的 AutoESL's AutoPilot 這套工具算是有比較大的進展
想請問這東西的未來 因為上網了看了許多PAPER與文件 發現對於不同層級的設計者
從高階語言與硬體描述語言之間看法與實作上的歧異
高階合成的概念似乎有它的價值在 想請問各位先進這東西將來在台灣有搞頭嗎
因為聽前人所說目前電路設計依然是verilog VHDL為主 謝謝大家
--
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工程師
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