Engineer Intern, HsinChu, Broadcom - 工程師
By Puput
at 2013-05-26T02:00
at 2013-05-26T02:00
Table of Contents
看到一個台灣留學美國的這樣回文才令人失望
台灣跟美國做的東西差不多
憑甚麼就該拿低薪 一個小時109連4usd/hour都不到
你去美國請請看啊 working holiday都比這個起碼高兩倍
小的也在美國intern過 revenue比broadcom大幾倍的semiconductor公司
月薪制多過5000usd
Broadcom會這樣做就是代表他們的HR已經在自以為是做踐台灣人調低薪資
我也贊成年輕的時候不必太計較薪資
但是這種水準表明就是來壓榨人
上班這麼多年
我看到台灣的工程師不輸給美國的工程師
卻要忍受薪資遠低於美國
Broadcom好歹也是個接近全球化的公司
台灣這邊的產值會比美國差嗎 懂ROI標準的人應該知道一顆IC要kick off是怎麼取捨
在台灣的學生intern就該deserve這種起薪標準嗎
I don't think so.
※ 引述《ginnyisme (男得糊塗)》之銘言:
: ※ 引述《takingblue (takingblue)》之銘言:
: 看到版上一堆的推文真的挺失望的
: 小的在Broadcom美國總部實習過 analog ic design
: 一小時美國碩士是30美金
: 博士基本35 離開時我是40美金 組裡有45美金的
: 當然跟軟體公司如google amazon比還有段差距
: 但是EE來說差不多是這樣
: 最好是有109USD的可能 用點心就不會留這種文了
: Law school 接近JD也許 但至少top 5 law school謝謝
: 所以請別再亂講
: 上班這麼多年
: 有些心得分享
: Brcm這份summer intern要不要申請?
: 當然要!
: 年輕時請別把錢看太重 真的
: 沒有那麼重要
: 資歷才會是讓你往後薪水exponential成長的關鍵
: 尤其是這份工作又不是testing
: 寫寫verilog code
: 這麼說好了 念類比的人以為幹VHDL verilog有啥用
: 以後出去工作你才會後悔
: 做top simulation你還真以為是full circuit在跑嗎?
: 跑一個禮拜都不見得跑的完
: 多懂一點 如果真的有興趣
: 這條ee的路會走的順利開心很多
: 沒有熱情 哪都不會成功
: 何況他說至少109/hr 你以為給NTU的真的是109嗎?
: 所以 快申請吧!
: 沒能力的就繼續嘴砲沒關係
: 因為你丟履歷也不會有人屌
: : Responsibility:
: : The position is to primary involve in IC sim support for wireless
: : connectivity chips. The candidate will work closely with design and DV team.
: : Working hours: Mon~Fri, at least 20 hours per week and pay by hours. Expect
: : to be long term intern instead of summer intern.
: : Salary: At least 109/hour, adjusted by experience/education
: : Prerequisite: 1.Must be student in EE/CS or related field
: : 2.Familiar with the scripting, C and Verilog/VHDL
: : language and NC or VCS simulation tool
: : Contact Information : Please send your resume to [email protected]
--
台灣跟美國做的東西差不多
憑甚麼就該拿低薪 一個小時109連4usd/hour都不到
你去美國請請看啊 working holiday都比這個起碼高兩倍
小的也在美國intern過 revenue比broadcom大幾倍的semiconductor公司
月薪制多過5000usd
Broadcom會這樣做就是代表他們的HR已經在自以為是做踐台灣人調低薪資
我也贊成年輕的時候不必太計較薪資
但是這種水準表明就是來壓榨人
上班這麼多年
我看到台灣的工程師不輸給美國的工程師
卻要忍受薪資遠低於美國
Broadcom好歹也是個接近全球化的公司
台灣這邊的產值會比美國差嗎 懂ROI標準的人應該知道一顆IC要kick off是怎麼取捨
在台灣的學生intern就該deserve這種起薪標準嗎
I don't think so.
※ 引述《ginnyisme (男得糊塗)》之銘言:
: ※ 引述《takingblue (takingblue)》之銘言:
: 看到版上一堆的推文真的挺失望的
: 小的在Broadcom美國總部實習過 analog ic design
: 一小時美國碩士是30美金
: 博士基本35 離開時我是40美金 組裡有45美金的
: 當然跟軟體公司如google amazon比還有段差距
: 但是EE來說差不多是這樣
: 最好是有109USD的可能 用點心就不會留這種文了
: Law school 接近JD也許 但至少top 5 law school謝謝
: 所以請別再亂講
: 上班這麼多年
: 有些心得分享
: Brcm這份summer intern要不要申請?
: 當然要!
: 年輕時請別把錢看太重 真的
: 沒有那麼重要
: 資歷才會是讓你往後薪水exponential成長的關鍵
: 尤其是這份工作又不是testing
: 寫寫verilog code
: 這麼說好了 念類比的人以為幹VHDL verilog有啥用
: 以後出去工作你才會後悔
: 做top simulation你還真以為是full circuit在跑嗎?
: 跑一個禮拜都不見得跑的完
: 多懂一點 如果真的有興趣
: 這條ee的路會走的順利開心很多
: 沒有熱情 哪都不會成功
: 何況他說至少109/hr 你以為給NTU的真的是109嗎?
: 所以 快申請吧!
: 沒能力的就繼續嘴砲沒關係
: 因為你丟履歷也不會有人屌
: : Responsibility:
: : The position is to primary involve in IC sim support for wireless
: : connectivity chips. The candidate will work closely with design and DV team.
: : Working hours: Mon~Fri, at least 20 hours per week and pay by hours. Expect
: : to be long term intern instead of summer intern.
: : Salary: At least 109/hour, adjusted by experience/education
: : Prerequisite: 1.Must be student in EE/CS or related field
: : 2.Familiar with the scripting, C and Verilog/VHDL
: : language and NC or VCS simulation tool
: : Contact Information : Please send your resume to [email protected]
--
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